Aegis Project Roadmap
This document outlines the planned future features and optimization tracks for the Aegis Packet Processing Framework.
Phase 1: Core Framework (Current Work)
- Cache-aligned lock-free SPSC queue infrastructure.
- Zero-copy protocol headers and payload parsing.
- Flat pre-allocated connection tables.
- Double-buffered atomic rules hot-reloader.
- Polling Output Writer architecture.
- Micro and Macro benchmark suites.
Phase 2: Fuzzing & Testing Expansion
- libFuzzer Integration: Set up continuous fuzz testing for packet parsing and TLS SNI extractor entry points.
- Malformed Frame Harness: Fuzz with corrupt IP, TCP, and TLS lengths to verify parser robustness against memory violations.
- Continuous Regression Benchmarking: Set up a GitHub Actions workflow to run nightlies and fail the build if processing throughput decreases by more than 5%.
Phase 3: Hardware Acceleration & SIMD
- SIMD Vectorization (AVX2/SSE/NEON):
- Vectorize IP/CIDR matching loops to check 4 or 8 addresses in parallel.
- Vectorize TLS SNI string searches and suffix trie scanning using SIMD vector instructions (e.g.
_mm256_cmpeq_epi8). - Kernel Bypass Ingestion:
- Implement an optional DPDK (Data Plane Development Kit) or AF_XDP ingestion plugin to read packets directly from the NIC ring buffer, bypassing the Linux network stack.
Phase 4: Plugin ABI & External Modules
- Dynamic Plugin Loading:
- Develop a stable ABI interface (
aegis_plugin.h) for protocol decoders. - Support loading custom dynamic libraries (
.so/.dll) at runtime. - Implement registration, capability flags, and API version handshakes.